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? 2007 microchip technology inc. ds21897b-page 1 mcp4921/4922 features ?12-bit resolution ? 0.2 lsb dnl (typ) ? 2 lsb inl (typ) ? single or dual channel ? rail-to-rail output ? spi? interface with 20 mhz clock support ? simultaneous latching of the dual dacs w/ldac ? fast settling time of 4.5 s ? selectable unity or 2x gain output ? 450 khz multiplier mode ?external v ref input ? 2.7v to 5.5v single-supply operation ? extended temperature range: -40c to +125c applications ? set point or offset trimming ? sensor calibration ? digitally-controlled multiplier/divider ? portable instrumentation (battery-powered) ? motor feedback loop control block diagram description the microchip technology inc. mcp492x are 2.7 ? 5.5v, low-power, low dnl, 12-bit digital-to-analog con- verters (dacs) with optional 2x buffered output and spi interface. the mcp492x are dacs that provide high accuracy and low noise performance for industrial applications where calibration or compensation of signals (such as temperature, pressure and humidity) are required. the mcp492x are available in the extended tempera- ture range and pdip, soic, msop and tssop packages. the mcp492x devices utilize a resistive string archi- tecture, with its inherent advantages of low dnl error, low ratio metric temperature coefficient and fast settling time. these devices are specified over the extended temperature range. the mcp492x include double- buffered inputs, allowing simultaneous updates using the ldac pin. these devices also incorporate a power-on reset (por) circuit to ensure reliable power-up. package types op amps v dd av ss cs sdi sck interface logic input register a register b input dac a register register dac b string dac b string dac a v ref output logic power-on reset v ref a b v outa v outb ldac buffer buffer s h d n output gain logic gain logic 14 mcp4921 8-pin pdip, soic, msop 1 2 3 4 8 7 6 5 cs sck sdi v dd av ss v outa v refa ldac mcp4922 1 2 3 4 13 12 11 10 9 8 5 6 7 14-pin pdip, soic, tssop v dd nc cs sck v refb nc nc sdi ldac shdn v outb v outa v refa av ss 12-bit dac with spi? interface
mcp4921/4922 ds21897b-page 2 ? 2007 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? v dd ............................................................................................................. 6.5v all inputs and outputs w.r.t ............. av ss ?0.3v to v dd +0.3v current at input pins ....................................................2 ma current at supply pins ...............................................50 ma current at output pins ...............................................25 ma storage temperature .....................................-65c to +150c ambient temp. with power applied ................-55c to +125c esd protection on all pins ........... 4 kv (hbm), 400v (mm) maximum junction temperature (t j ) . .........................+150c ? notice: stresses above those lis ted under ?maximum rat- ings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this spec ification is not implied. expo- sure to maximum rating conditions for extended periods may affect device reliability. 5v ac/dc characteristics electrical specifications: unless otherwise indicated, v dd = 5v, av ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k to gnd, c l = 100 pf t a = -40 to +85c. typical values at +25c. parameters sym min typ max units conditions power requirements input voltage v dd 2.7 ? 5.5 input current - mcp4921 input current - mcp4922 i dd ? ? 175 350 350 700 a input unbuffered, digital inputs grounded, output unloaded, code at 0x000 hardware shutdown current i shdn ?0.3 2 a software shutdown current i shdn_sw ?3.3 6 a power-on-reset threshold v por ?2.0 ? v dc accuracy resolution n 12 ? ? bits inl error inl -12 2 12 lsb dnl dnl -0.75 0.2 +0.75 lsb device is monotonic offset error v os ? 0.02 1 % of fsr code 0x000h offset error temperature coefficient v os /c ? 0.16 ? ppm/c -45c to 25c ? -0.44 ? ppm/c +25c to 85c gain error g e ? -0.10 1 % of fsr code 0xfffh, not including offset error. gain error temperature coefficient g/c ? -3 ? ppm/c input amplifier (v ref input) input range - buffered mode v ref 0.040 ? v dd ? 0.040 v note 1 code = 2048 v ref = 0.2v p-p, f = 100 hz and 1 khz input range - unbuffered mode v ref 0? v dd v input impedance r vref ? 165 ? k unbuffered mode input capacitance - unbuffered mode c vref ?7 ? pf multiplier mode -3 db bandwidth f vref ? 450 ? khz v ref = 2.5v 0.2vp-p, unbuffered, g = 1 f vref ? 400 ? khz v ref = 2.5v 0.2 vp-p, unbuffered, g = 2 multiplier mode - total harmonic distortion thd vref ?-73 ? dbv ref = 2.5v 0.2vp-p, frequency = 1 khz note 1: by design, not production tested. 2: too small to quantify.
? 2007 microchip technology inc. ds21897b-page 3 mcp4921/4922 output amplifier output swing v out ? 0.010 to v dd ? 0.040 ? accuracy is better than 1 lsb for v out = 10 mv to (v dd ? 40 mv) phase margin m ? 66 ? degrees slew rate sr ? 0.55 ? v/s short circuit current i sc ?15 24 ma settling time t settling ? 4.5 ? s within 1/2 lsb of final value from 1/4 to 3/4 full-scale range dynamic performance dac-to-dac crosstalk ? 10 ? nv-s note 2 major code transition glitch ? 45 ? nv-s 1 lsb change around major carry (0111...1111 to 1000...0000) digital feedthrough ? 10 ? nv-s note 2 analog crosstalk ? 10 ? nv-s note 2 5v ac/dc characteris tics (continued) electrical specifications: unless otherwise indicated, v dd = 5v, av ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k to gnd, c l = 100 pf t a = -40 to +85c. typical values at +25c. parameters sym min typ max units conditions note 1: by design, not production tested. 2: too small to quantify. 3v ac/dc characteristics electrical specifications: unless otherwise indicated, v dd = 3v, av ss = 0v, v ref = 2.048v external, output buffer gain (g) = 1x, r l = 5 k to gnd, c l = 100 pf t a = -40 to +85c. typical values at 25c parameters sym min typ max units conditions power requirements input voltage v dd 2.7 ? 5.5 input current - mcp4921 input current - mcp4922 i dd ? ? 125 250 250 500 a input unbuffered, digital inputs grounded, output unloaded, code at 0x000 hardware shutdown current i shdn ?0.25 2 a software shutdown current i shdn_sw ?2 6 a power-on reset threshold v por ?2.0 ? v dc accuracy resolution n 12 ? ? bits inl error inl -12 3 +12 lsb dnl dnl -0.75 0.3 +0.75 lsb device is monotonic offset error v os ? 0.02 1 % of fsr code 0x000h offset error temperature coefficient v os /c ? 0.5 ? ppm/c -45c to 25c ? -0.77 ? ppm/c +25c to 85c gain error g e ? -0.15 1 % of fsr code 0xfffh, not including offset error. gain error temperature coefficient g/c ? -3 ? ppm/c input amplifier (v ref input) input range - buffered mode v ref 0.040 ? v dd -0.040 v note 1 code = 2048, v ref = 0.2v p-p, f = 100 hz and 1 khz input range - unbuffered mode v ref 0? v dd v input impedance r vref ? 165 ? k unbuffered mode note 1: by design, not production tested. 2: too small to quantify.
mcp4921/4922 ds21897b-page 4 ? 2007 microchip technology inc. input capacitance ? unbuffered mode c vref ?7 ? pf multiplier mode -3 db bandwidth f vref ? 440 ? khz v ref = 2.048v 0.1 vp-p, unbuffered, g = 1 f vref ? 390 ? khz v ref = 2.048v 0.1 vp-p, unbuffered, g = 2 multiplier mode ? total harmonic distortion thd vref ?-73 ? dbv ref = 2.5v 0.1 vp-p, frequency = 1 khz output amplifier output swing v out ? 0.010 to v dd ? 0.040 ? accuracy is better than 1 lsb for v out = 10 mv to (v dd ? 40 mv) phase margin m ? 66 ? degrees slew rate sr ? 0.55 ? v/s short circuit current i sc ?14 24 ma settling time t settling ? 4.5 ? s within 1/2 lsb of final value from 1/4 to 3/4 full-scale range dynamic performance dac-to-dac crosstalk ? 10 ? nv-s note 2 major code transition glitch ? 45 ? nv-s 1 lsb change around major carry (0111...1111 to 1000...0000) digital feedthrough ? 10 ? nv-s note 2 analog crosstalk ? 10 ? nv-s note 2 3v ac/dc characteris tics (continued) electrical specifications: unless otherwise indicated, v dd = 3v, av ss = 0v, v ref = 2.048v external, output buffer gain (g) = 1x, r l = 5 k to gnd, c l = 100 pf t a = -40 to +85c. typical values at 25c parameters sym min typ max units conditions note 1: by design, not production tested. 2: too small to quantify. 5v extended tempe rature specifications electrical specifications: unless otherwise indicated, v dd = 5v, av ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k to gnd, c l = 100 pf. typical values at +125c by characterization or simulation. parameters sym min typ max units conditions power requirements input voltage v dd 2.7 ? 5.5 input current - mcp4921 input current - mcp4922 i dd ? ? 200 400 ? ? a input unbuffered, digital inputs grounded, output unloaded, code at 0x000 hardware shutdown current i shdn ?1.5? a software shutdown current i shdn_sw ?5? a power-on reset threshold v por ?1.85? v dc accuracy resolution n 12 ? ? bits inl error inl ? 4 ? lsb dnl dnl ? 0.25 ? lsb device is monotonic offset error v os ? 0.02 ? % of fsr code 0x000h offset error temperature coefficient v os /c ? -5 ? ppm/c +25c to +125c note 1: by design, not production tested. 2: too small to quantify.
? 2007 microchip technology inc. ds21897b-page 5 mcp4921/4922 gain error g e ? -0.10 ? % of fsr code 0xfffh, not including offset error gain error temperature coefficient g/c ? -3 ? ppm/c input amplifier (v ref input) input range - buffered mode v ref ? 0.040 to v dd - 0.040 ?v note 1 code = 2048, v ref = 0.2v p-p, f = 100 hz and 1 khz input range - unbuffered mode v ref 0?v dd v input impedance r vref ? 174 ? k unbuffered mode input capacitance - unbuffered mode c vref ?7? pf multiplying mode -3 db bandwidth f vref ? 450 ? khz v ref = 2.5v 0.1 vp-p, unbuffered, g=1 f vref ? 400 ? khz v ref = 2.5v 0.1 vp-p, unbuffered, g = 2 multiplying mode - total harmonic distortion thd vref ??? dbv ref = 2.5v 0.1vp-p, frequency = 1 khz output amplifier output swing v out ? 0.010 to v dd ? 0.040 ? accuracy is better than 1 lsb for v out = 10 mv to (v dd ? 40 mv) phase margin m ? 66 ? degrees slew rate sr ? 0.55 ? v/s short circuit current i sc ?17? ma settling time t settling ? 4.5 ? s within 1/2 lsb of final value from 1/4 to 3/4 full-scale range dynamic performance dac to dac crosstalk ? 10 ? nv-s note 2 major code transition glitch ? 45 ? nv-s 1 lsb change around major carry (0111...1111 to 1000...0000) digital feedthrough ? 10 ? nv-s note 2 analog crosstalk ? 10 ? nv-s note 2 5v extended temp erature specificat ions (continued) electrical specifications: unless otherwise indicated, v dd = 5v, av ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k to gnd, c l = 100 pf. typical values at +125c by characterization or simulation. parameters sym min typ max units conditions note 1: by design, not production tested. 2: too small to quantify.
mcp4921/4922 ds21897b-page 6 ? 2007 microchip technology inc. ac characteristics (spi timing specifications) figure 1-1: spi? input timing. electrical specifications: unless otherwise indicated, v dd = 2.7v ? 5.5v, t a = -40 to +125c. typical values are at +25c. parameters sym min typ max units conditions schmitt trigger high-level input voltage (all digital input pins) v ih 0.7 v dd ??v schmitt trigger low-level input voltage (all digital input pins) v il ??0.2v d d v hysteresis of schmitt trigger inputs v hys ?0.05v dd ? input leakage current i leakage -1 ? 1 ashdn = ldac = cs = sdi = sck + v ref = v dd or av ss digital pin capacitance (all inputs/outputs) c in , c out ?10?pfv dd = 5.0v, t a = +25c, f clk = 1 mhz (note 1) clock frequency f clk ??20mhzt a = +25c (note 1) clock high time t hi 15 ? ? ns note 1 clock low time t lo 15 ? ? ns note 1 cs fall to first rising clk edge t cssr 40 ? ? ns applies only when cs falls with clk high. (note 1) data input setup time t su 15 ? ? ns note 1 data input hold time t hd 10 ? ? ns note 1 sck rise to cs rise hold time t chs 15 ? ? ns note 1 cs high time t csh 15 ? ? ns note 1 ldac pulse width t ld 100 ? ? ns note 1 ldac setup time t ls 40 ? ? ns note 1 sck idle time before cs fall t idle 40 ? ? ns note 1 note 1: by design and characterization, not production tested. cs sck si ldac t cssr t hd t su t lo t csh t chs lsb in msb in t idle mode 1,1 mode 0,0 t hi t ld t ls
? 2007 microchip technology inc. ds21897b-page 7 mcp4921/4922 temperature characteristics electrical specifications: unless otherwise indicated, v dd = +2.7v to +5.5v, av ss =gnd. parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 ? +125 c operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 8l-pdip ja ?85?c/w thermal resistance, 8l-soic ja ?163?c/w thermal resistance, 8l-msop ja ?206?c/w thermal resistance, 14l-pdip ja ?70?c/w thermal resistance, 14l-soic ja ?120?c/w thermal resistance, 14l-tssop ja ?100?c/w note 1: the mcp492x family of dacs operate over this extended temperature range, but with reduced performance. operation in this range must not cause t j to exceed the maximum junction temperature of 150c.
mcp4921/4922 ds21897b-page 8 ? 2007 microchip technology inc. 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.048v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-1: dnl vs. code. figure 2-2: dnl vs. code and ambient temperature. figure 2-3: dnl vs. code and v ref . gain=1. figure 2-4: absolute dnl vs. ambient temperature. figure 2-5: absolute dnl vs. voltage reference. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0 1024 2048 3072 4096 code (decimal) dnl (lsb) -0.2 -0.1 0 0.1 0.2 0 1024 2048 3072 4096 code (decimal) dnl (lsb) 125c 85c 25c -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0 1024 2048 3072 4096 code (decimal) dnl (lsb) 1 2 3 4 5.5 0.075 0.0752 0.0754 0.0756 0.0758 0.076 0.0762 0.0764 0.0766 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) absolute dnl (lsb) 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 12345 voltage reference (v) absolute dnl (lsb)
? 2007 microchip technology inc. ds21897b-page 9 mcp4921/4922 note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.048v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-6: inl vs. code and ambient temperature. figure 2-7: absolute inl vs. ambient temperature. figure 2-8: absolute inl vs. v ref . figure 2-9: inl vs. code and v ref . figure 2-10: inl vs. code. -5 -4 -3 -2 -1 0 1 2 3 4 5 0 1024 2048 3072 4096 code (decimal) inl (lsb) 125c 85 25 ambient temperature 0 0.5 1 1.5 2 2.5 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) absolute inl (lsb) 0 0.5 1 1.5 2 2.5 3 12345 voltage reference (v) absolute inl (lsb) note: single device graph (figure 2-10) for illustration of 64 code effect. -4 -3 -2 -1 0 1 2 3 0 1024 2048 3072 4096 code (decimal) inl (lsb) 1 2 3 4 5.5 v ref -6 -4 -2 0 2 0 1024 2048 3072 4096 code (decimal) inl (lsb)
mcp4921/4922 ds21897b-page 10 ? 2007 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v, av ss = 0v, v ref = 2.048v, gain = 2. figure 2-11: mcp4921 i dd vs. ambient temperature and v dd . figure 2-12: mcp4921 i dd histogram (v dd = 2.7v). figure 2-13: mcp4921 i dd histogram (v dd = 5.0v). figure 2-14: mcp4922 i dd vs. ambient temperature and v dd . figure 2-15: mcp4922 i dd histogram (v dd = 2.7v). figure 2-16: mcp4922 i dd histogram (v dd = 5.0v). 110 130 150 170 190 210 -40-20 0 20406080100120 ambient temperature (c) i dd (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0 2 4 6 8 10 12 14 16 18 143 145 147 149 151 153 155 157 159 161 163 165 167 i dd (a) occurrence 0 1 2 3 4 5 6 7 8 9 151 156 161 166 171 176 181 186 191 196 201 i dd (a) occurrence 200 250 300 350 400 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) i dd (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0 2 4 6 8 10 12 14 16 18 20 215 225 235 245 255 265 275 285 295 305 315 325 i dd (a) occurrence 0 2 4 6 8 10 12 14 16 250 265 280 295 310 325 340 355 370 385 400 415 i dd (a) occurrence
? 2007 microchip technology inc. ds21897b-page 11 mcp4921/4922 note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.048v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-17: hardware shutdown current vs. ambient temperature and v dd . figure 2-18: software shutdown current vs. ambient temperature and v dd . figure 2-19: offset error vs. ambient temperature and v dd . figure 2-20: gain error vs. ambient temperature and v dd . figure 2-21: v in high threshold vs ambient temperature and v dd . figure 2-22: v in low threshold vs ambient temperature and v dd . 0 0.5 1 1.5 2 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) i shdn (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0 1 2 3 4 5 6 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) i shdn_sw (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v -0.02 0 0.02 0.04 0.06 0.08 0.1 0.12 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) offset error (%) v dd 5.5v 4.0 v 5.0v 3.0v 2.7v -0.16 -0.14 -0.12 -0.1 -0.08 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) gain error (%) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 1 1.5 2 2.5 3 3.5 4 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v in hi threshold (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v in low threshold (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v
mcp4921/4922 ds21897b-page 12 ? 2007 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.048v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-23: input hysteresis vs. ambient temperature and v dd . figure 2-24: v ref input impedance vs. ambient temperature and v dd . figure 2-25: v out high limit vs. ambient temperature and v dd . figure 2-26: v out low limit vs. ambient temperature and v dd . figure 2-27: i out high short vs. ambient temperature and v dd . figure 2-28: i out vs v out . gain = 1. 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v in _ spi hysteresis (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 155 160 165 170 175 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v ref_unbuffered impedance (kohm) v dd 5.5v - 2.7v 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v out_hi limit (v dd -y)(v) v dd 5.5v 4.0 v 5.0v 3.0v 2.7v 0.0015 0.002 0.0025 0.003 0.0035 0.004 0.0045 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v out_low limit (y-av ss )(v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 10 11 12 13 14 15 16 17 18 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) i out_hi_shorted (ma) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0246810121416 i out (ma) v out (v) v ref =4.0 output shorted to v ss output shorted to v dd
? 2007 microchip technology inc. ds21897b-page 13 mcp4921/4922 note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.048v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-29: v out rise time 100%. figure 2-30: v out fall time. figure 2-31: v out rise time 50%. figure 2-32: v out rise time 25% - 75% figure 2-33: v out rise time exit shutdown. figure 2-34: psrr vs. frequency. v out sck ldac time (1 s/div) v out sck ldac time (1 s/div) v out sck ldac time (1 s/div) time (1 s/div) v out ldac time (1 s/div) v out sck ldac ripple rejection (db) frequency (hz)
mcp4921/4922 ds21897b-page 14 ? 2007 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v , av ss = 0v, v ref = 2.50v, gain = 2, r l = 5 k , c l = 100 pf. figure 2-35: multiplier mode bandwidth. figure 2-36: -3 db bandwidth vs. worst codes. figure 2-37: phase shift. -12 -10 -8 -6 -4 -2 0 100 1,000 frequency (khz) attenuation (db) d = 160 d = 416 d = 672 d = 928 d = 1184 d = 1440 d = 1696 d = 1952 d = 2208 d = 2464 d = 2720 d = 2976 d = 3232 d = 3488 d = 3744 figure 2-35 calculation: attenuation (db) = 20 log (v out /v ref ) ? 20 log (g(d/4096 )) 400 420 440 460 480 500 520 540 560 580 600 1 6 0 4 1 6 6 7 2 9 2 8 1 1 84 1 4 40 1 6 96 1 9 52 2 2 08 2 4 64 2 7 20 2 9 76 3 2 32 3 4 88 3 7 44 worst case codes (decimal) bandwidth (khz) g = 1 g = 2 -180 -135 -90 -45 0 100 1,000 frequency (khz) q vref ? q vout d = 160 d = 416 d = 672 d = 928 d = 1184 d = 1440 d = 1696 d = 1952 d = 2208 d = 2464 d = 2720 d = 2976 d = 3232 d = 3488 d = 3744
? 2007 microchip technology inc. ds21897b-page 15 mcp4921/4922 3.0 pin descriptions the descriptions of the pins are listed in table 3-1. table 3-1: pin function table 3.1 positive power supply input (v dd ) v dd is the positive power supply input. the input power supply is relative to av ss and can range from 2.7v to 5.5v. a decoupling capacitor on v dd is recommended to achieve maximum performance. 3.2 chip select (cs ) cs is the chip select input, which requires an active-low signal to enable serial clock and data functions. 3.3 serial clock input (sck) sck is the spi compatible serial clock input. 3.4 serial data input (sdi) sdi is the spi compatible serial data input. 3.5 latch dac input (ldac ) ldac (the latch dac syncronization input) transfers the input latch registers to the dac registers (output latches) when low. can also be tied low if transfer on the rising edge of cs is desired. 3.6 hardware shutdown input (shdn ) shdn is the hardware shutdown input that requires an active-low input signal to configure the dacs in their low-power standby mode. 3.7 dac x outputs (v outa , v outb ) v outa and v outb are dac outputs. the dac output amplifier drives these pins with a range of av ss to v dd . 3.8 dac x voltage reference inputs (v refa , v refb ) v refa and v refb are dac voltage reference inputs. the analog signal on these pins is utilized to set the ref- erence voltage on the string dac. the input signal can range from av ss to v dd . 3.9 analog ground (av ss ) av ss is the analog ground pin. mcp4921 pin no. mcp4922 pin no. symbol function 11v dd positive power supply input (2.7v to 5.5v) ? 2 nc no connection 23 cs chip select input 3 4 sck serial clock input 4 5 sdi serial data input ? 6 nc no connection ? 7 nc no connection 58ldac syncronization input used to transfer dac settings from serial latches to the output latches. ? 9 shdn hardware shutdown input ?10v outb dac b output ?11v refb dac b voltage input (av ss to v dd ) 712av ss analog ground 613v refa dac a voltage input (av ss to v dd ) 814v outa dac a output
mcp4921/4922 ds21897b-page 16 ? 2007 microchip technology inc. 4.0 general overview the mcp492x devices are voltage output string dacs. these devices include input amplifiers, rail-to-rail out- put amplifiers, reference buffers, shutdown and reset- management circuitry. serial communication conforms to the spi protocol. the mcp492x operates from 2.7v to 5.5v supplies. the coding of these devices is straight binary and the ideal output voltage is given by equation 4-1, where g is the selected gain (1x or 2x), d n represents the digital input value and n represents the number of bits of resolution (n = 12). equation 4-1: lsb size 1 lsb is the ideal voltage difference between two successive codes. table 4-1 illustrates how to calculate lsb. 4.0.1 inl accuracy inl error for these devices is the maximum deviation between an actual code transition point and its corre- sponding ideal transition point once offset and gain errors have been removed. these endpoints are from 0x000 to 0xfff. refer to figure 4-1. positive inl means transition(s) later than ideal. negative inl means transition(s) earlier than ideal. figure 4-1: inl accuracy. 4.0.2 dnl accuracy dnl error is the measure of variations in code widths from the ideal code width. a dnl error of zero would imply that every code is exactly 1 lsb wide. figure 4-2: dnl accuracy. 4.0.3 offset error offset error is the deviation from zero voltage output when the digital input code is zero. 4.0.4 gain error gain error is the deviation from the ideal output, v ref ? 1 lsb, excluding the effects of offset error. table 4-1: lsb sizes device v ref , gain lsb size mcp492x external v ref , 1x v ref /4096 mcp492x external v ref , 2x 2 v ref /4096 v out v ref gd n 2 n ------------------------- = 111 110 101 100 011 010 001 000 digital input code actual transfer function inl < 0 ideal transfer function inl < 0 dac output 111 110 101 100 011 010 001 000 digital input code actual transfer function ideal transfer function narrow code < 1 lsb dac output wide code, > 1 lsb
? 2007 microchip technology inc. ds21897b-page 17 mcp4921/4922 4.1 circuit descriptions 4.1.1 output amplifiers the dacs? outputs are buffered with a low-power, precision cmos amplifier. this amplifier provides low offset voltage and low noise. the output stage enables the device to operate with output voltages close to the power supply rails. refer to section 1.0 ?electrical characteristics? for range and load conditions. in addition to resistive load driving capability, the ampli- fier will also drive high capacitive loads without oscilla- tion. the amplifiers? strong outputs allow v out to be used as a programmable voltage reference in a system. selecting a gain of 2 reduces the bandwidth of the amplifier in multiplying mode. refer to section 1.0 ?electrical characteristics? for the multiplying mode bandwidth for given load conditions. 4.1.1.1 programmable gain block the rail-to-rail output amplifier has configurable gain allowing optimal full-scale outputs for differing voltage reference inputs. the output amplifier gain has two selections, a gain of 1 v/v (ga = 1) or a gain of 2 v/v (ga = 0). the output range is ideally 0.000v to 4095/4096 * v ref when g = 1, and 0.000 to 4095/4096 * v ref when g = 2. the default value for this bit is a gain of 2, yield- ing an ideal full-scale output of 0.000v to 4.096v when utilizing a 2.048v v ref . note that the near rail-to-rail cmos output buffer?s ability to approach av ss and v dd establish practical range limitations. the output swing specification in section 1.0 ?electrical charac- teristics? defines the range for a given load condition. 4.1.2 voltage reference amplifiers the input buffer amplifiers for the mcp492x devices provide low offset voltage and low noise. a configura- tion bit for each dac allows the v ref input to bypass the input buffer amplifiers, achieving a buffered or unbuffered mode. the default value for this bit is unbuffered. buffered mode provides a very high input impedance, with only minor limitations on the input range and frequency response. unbuffered mode provides a wide input range (0v to v dd ), with a typical input impedance of 165 k w/7 pf. 4.1.3 power-on reset circuit the power-on reset (por) circuit ensures that the dacs power-up with shdn = 0 (high-impedance). the devices will continue to have a high-impedance output until a valid write command is performed to either of the dac registers and the ldac pin meets the input low threshold. if the power supply voltage is less than the por threshold (v por = 2.0v, typical), the dacs will be held in their reset state. they will remain in that state until v dd > v por and a subsequent write command is received. figure 4-3 shows a typical power supply transient pulse and the duration required to cause a reset to occur, as well as the relationship between the duration and trip voltage. a 0.1 f decoupling capacitor mounted as close as possible to the v dd pin provides additional transient immunity. figure 4-3: typical transient response. 4.1.4 shutdown mode shutdown mode can be entered by using either hard- ware or software commands. the hardware pin (shdn ) is only available on the mcp4922. during shutdown mode, the supply current is isolated from most of the internal circuitry. the serial interface remains active, thus allowing a write command to bring the device out of shutdown mode. when the output amplifiers are shut down, the feedback resis- tance (typically 500 k ) produces a high-impedance path to av ss . the device will remain in shutdown mode until the shdn pin is brought high and a write command with s d = 1 is latched into the device. when a dac is changed from shutdown to active mode, the output settling time takes < 10 s, but greater than the standard active mode settling time (4.5 s). transients above the curve will cause a reset transients below the curve will not cause a reset 5v time supply voltages transient duration v por v dd - v por t a = +25c transient duration (s) 10 8 6 4 2 0 12345 v dd ? v por (v)
mcp4921/4922 ds21897b-page 18 ? 2007 microchip technology inc. 5.0 serial interface 5.1 overview the mcp492x family is designed to interface directly with the serial peripheral interface (spi) port, available on many microcontrollers, and supports mode 0,0 and mode 1,1. commands and data are sent to the device via the sdi pin, with data being clocked-in on the rising edge of sck. the communications are unidirectional and, thus, data cannot be read out of the mcp492x. the cs pin must be held low for the duration of a write command. the write command consists of 16 bits and is used to configure the dac?s control and data latches. register 5-1 details the input registers used to config- ure and load the dac a and dac b registers. refer to figure 1-1 and section 1.0 ?electrical characteris- tics? ac electrical characteristics table for detailed input and output timing specifications for both mode 0,0 and mode 1,1 operation. 5.2 write command the write command is initiated by driving the cs pin low, followed by clocking the four configuration bits and the 12 data bits into the sdi pin on the rising edge of sck. the cs pin is then raised, causing the data to be latched into the selected dac?s input registers. the mcp492x utilizes a double-buffered latch structure to allow both dac a ?s and dac b ?s outputs to be syncronized with the ldac pin, if desired. upon the ldac pin achieving a low state, the values held in the dac?s input registers are transferred into the dacs? output registers. the outputs will transition to the value and held in the dac x register. all writes to the mcp492x are 16-bit words. any clocks past 16 will be ignored. the most significant four bits are configuration bits. the remaining 12 bits are data bits. no data can be transferred into the device with cs high. this transfer will only occur if 16 clocks have been transferred into the device. if the ris- ing edge of cs occurs prior, shifting of data into the input registers will be aborted. register 5-1: write command register bit 15 a /b: dac a or dac b select bit 1 = write to dac b 0 = write to dac a bit 14 buf: v ref input buffer control bit 1 = buffered 0 = unbuffered bit 13 ga : output gain select bit 1 =1x (v out = v ref * d/4096) 0 =2x (v out = 2 * v ref * d/4096) bit 12 shdn : output power down control bit 1 = output power down control bit 0 = output buffer disabled, output is high impedance bit 11-0 d11:d0: dac data bits 12 bit number ?d? which sets the output value. contains a value between 0 and 4095. upper half: w-x w-x w-x w-0 w-x w-x w-x w-x a /b buf ga shdn d11 d10 d9 d8 bit 15 bit 8 lower half: w-x w-x w-x w-x w-x w-x w-x w-x d7 d6 d5 d4 d3 d2 d1 d0 bit 7 bit 0 legend r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por 1 = bit is set 0 = bit is cleared x = bit is unknown
? 2007 microchip technology inc. ds21897b-page 19 mcp4921/4922 figure 5-1: write command. sdi sck cs 0 2 1 a /b buf ga shdn d11 d10 config bits 12 data bits ldac 3 4 d9 5 6 7 d8 d7 d6 8 9 10 12 d5 d4 d3 d2 d1 d0 11 13 14 15 v out (mode 1,1) (mode 0,0)
mcp4921/4922 ds21897b-page 20 ? 2007 microchip technology inc. 6.0 typical applications the mcp492x devices are general purpose dacs intended to be used in applications where a precision, low-power dac with moderate bandwidth is required. applications generally suited for the mcp492x devices include: ? set point or offset trimming ? sensor calibration ? digitally-controlled multiplier/divider ? portable instrumentation (battery powered) ? motor feedback loop control 6.1 digital interface the mcp492x utilizes a 3-wire syncronous serial protocol to transfer the dacs? setup and output values from the digital source. the serial protocol can be inter- faced to spi? or microwire peripherals common on many microcontrollers, including microchip?s pic ? mcus & dspic tm dsc family of microcontrollers. in addition to the three serial connections (cs , sck and sdi), the ldac signal syncronizes when the serial settings are latched into the dac?s output from the serial input latch. figure 6-1 illustrates the required connections. note that ldac is active-low. if desired, this input can be tied low to reduce the required con- nections from 4 to 3. write commands will be latched directly into the output latch when a valid 16 clock transmission has been received and cs has been raised. 6.2 power supply considerations the typical application will require a by-pass capacitor in order to filter high-frequency noise. the noise can be induced onto the power supply's traces or as a result of changes on the dac's output. the bypass capacitor helps to minimize the effect of these noise sources on signal integrity. figure 6-1 illustrates an appropriate bypass strategy. in this example, the recommended bypass capacitor value is 0.1 f. this capacitor should be placed as close to the device power pin (v dd ) as possible (within 4mm). the power source supplying these devices should be as clean as possible. if the application circuit has sep- arate digital and analog power supplies, av dd and av ss should reside on the analog plane. figure 6-1: typical connection diagram. 6.3 layout considerations inductively-coupled ac transients and digital switching noise can degrade the input and output signal integrity, potentially masking the mcp492x?s performance. careful board layout will minimize these effects and increase the signal-to-noise ratio (snr). bench testing has shown that a multi-layer board utilizing a low-induc- tance ground plane, isolated inputs, isolated outputs and proper decoupling are critical to achieving the performance that the silicon is capable of providing. particularly harsh environments may require shielding of critical signals. breadboards and wire-wrapped boards are not recommended if low noise is desired. note: at the time of this data sheet?s release, circuit examples had not completed testing. your results may vary. mcp492x v dd v dd v dd av ss av ss av ss v refa v outa v refb v outb mcp492x 0.1 f pic ? microcontroller 0.1 f 0.1 f v refa v outa v refb v outb sdi sdi cs 1 sdo sck ldac cs 0
? 2007 microchip technology inc. ds21897b-page 21 mcp4921/4922 6.4 single-supply operation the mcp492x is a rail-to-rail (r-r) input and output dac designed to operate with a v dd range of 2.7v to 5.5v. its output amplifier is robust enough to drive com- mon, small-signal loads directly, thus eliminating the cost and size of an external buffer for most applications. 6.4.1 dc set point or calibration a common application for a dac with the mcp492x?s performance is digitally-controlled set points and/or calibration of variable parameters, such as sensor off- set or slope. 12-bit resolution provides 4096 output steps. if a 4.096v v ref is provided, an lsb would represent 1 mv of resolution. if a smaller output step size is desired, the output range would need to be reduced. 6.4.1.1 decreasing the output step size if the output range is reduced relative to av ss , simply reducing v ref will reduce the magnitude of each out- put step. if the application is calibrating the threshold of a diode, transistor or resistor tied to av ss or v ref , a theshold range of 0.8v may be desired to provide 200 v resolution. two common methods to achieve a 0.8v range is to either reduce v ref to 0.82v or use a voltage divider on the dac?s output. if a v ref is avail- able with the desired output value, using that v ref is an option. occasionally, when using a low-voltage v ref , the noise floor causes snr error that is intolerable. the voltage divider method provides some advantages when v ref needs to be very low or when the desired output voltage is not available. in this case, a larger value v ref is used while two resistors scale the output range down to the precise desired level. using a com- mon v ref output has availability and cost advantages. example 6-1 illustrates this concept. note that the volt- age divider can be connected to av ss or v ref , depending on the application?s requirements. the mcp492x?s low, 0.75 (max.) dnl performance is critical to meeting calibration accuracy in production. example 6-1: set point or threshold calibration. v ref mcp492x v dd spi? 3 v trip r 1 r 2 0.1 uf comparator g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) v out v ref g d 2 12 ------- = v cc + v cc ? v out v trip v out r 2 r 1 r 2 + ------------------ ?? ?? = v dd r sense
mcp4921/4922 ds21897b-page 22 ? 2007 microchip technology inc. 6.4.1.2 building a ?window? dac when calibrating a set point or threshold of a sensor, rarely does the sensor utilize the entire output range of the dac. if the lsb size is adequate to meet the appli- cation?s accuracy needs, then the resolution is sacri- ficed without consequences. if greater accuracy is needed, then the output range will need to be reduced to increase the resolution around the desired threshold. if the threshold is not near v ref or av ss , then creating a ?window? around the threshold has several advan- tages. one simple method to create this ?window? is to use a voltage divider network with a pull-up and pull- down resistor. example 6-2 and example 6-4 illustrates this concept. the mcp492x?s low, 0.75 (max.) dnl performance is critical to meet calibration accuracy in production. example 6-2: single-supply ?window? dac. v ref mcp492x v dd spi? 3 v trip r 1 r 2 0.1 f comparator r 3 v cc- g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) v cc+ v cc+ v cc- v out v out v ref g d 2 12 ------- = r 23 r 2 r 3 r 2 r 3 + ------------------ = v 23 v cc+ r 2 () v cc- r 3 () + r 2 r 3 + ----------------------------------------------------- - = v trip v out r 23 v 23 r 1 + r 2 r 23 + ------------------------------------------- - = r 1 r 23 v 23 v out v o thevenin equivalent r sense
? 2007 microchip technology inc. ds21897b-page 23 mcp4921/4922 6.5 bipolar operation bipolar operation is achievable using the mcp492x by using an external operational amplifier (op amp). this configuration is desirable due to the wide variety and availability of op amps. this allows a general purpose dac, with its cost and availability advantages, to meet almost any desired output voltage range, power and noise performance. example 6-3 illustrates a simple bipolar voltage source configuration. r 1 and r 2 allow the gain to be selected, while r 3 and r 4 shift the dac's output to a selected offset. note that r4 can be tied to v ref , instead of av ss , if a higher offset is desired. note that a pull-up to v ref could be used, instead of r 4 , if a higher offset is desired. example 6-3: digitally-controlled bipolar voltage source. 6.5.1 design a bipolar dac using example 6-3 an output step magnitude of 1 mv with an output range of 2.05v is desired for a particular application. 1. calculate the range: +2.05v ? (-2.05v) = 4.1v. 2. calculate the resolution needed: 4.1v/1 mv = 4100 since 2 12 = 4096, 12-bit resolution is desired. 3. the amplifier gain (r 2 /r 1 ), multiplied by v ref , must be equal to the desired minimum output to achieve bipolar operation. since any gain can be realized by choosing resistor values (r 1 +r 2 ), the v ref source needs to be determined first. if a v ref of 4.1v is used, solve for the gain by setting the dac to 0, knowing that the output needs to be -2.05v. the equation can be simplified to: 4. next, solve for r 3 and r 4 by setting the dac to 4096, knowing that the output needs to be +2.05v. v ref mcp492x v ref v dd spi? 3 v out r 3 r 4 r 2 r 1 v in + g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) 0.1 f v cc + v cc ? v out v ref g d 2 12 ------- = v in+ v out r 4 r 3 r 4 + -------------------- = v o v o v in+ 1 r 2 r 1 ----- - + ?? ?? v ref r 2 r 1 ----- - ?? ?? ? = r 2 ? r 1 -------- - 2.05 ? v ref ------------- 2.05 ? 4.1 ------------- == if r 1 = 20 k and r 2 = 10 k , the gain will be 0.5. r 2 r 1 ----- - 1 2 -- - = r 4 r 3 r 4 + () ----------------------- 2.05v 0.5v ref + 1.5v ref ----------------------------------------- 2 3 -- - == if r 4 = 20 k , then r 3 = 10 k
mcp4921/4922 ds21897b-page 24 ? 2007 microchip technology inc. 6.6 selectable gain and offset bipolar voltage output using a dual dac in some applications, precision digital control of the output range is desirable. example 6-4 illustrates how to use the mcp4922 to achieve this in a bipolar or single-supply application. this circuit is typically used in multiplier mode and is ideal for linearizing a sensor whose slope and offset varies. refer to section 6.9 ?using multiplier mode? for more information on multiplier mode. the equation to design a bipolar ?window? dac would be utilized if r 3 , r 4 and r 5 are populated. example 6-4: bipolar voltage source with selectable gain and offset. v refa mcp492x v dd r 3 r 4 r 2 v o mcp492x v dd r 1 dac a (gain adjust) dac b (offset adjust) spi? 3 r 5 v cc + thevenin bipolar ?window? dac using r 4 and r 5 g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) 0.1uf v cc ? av ss = gnd v cc + v cc ? v outb v refb g b () d b 2 12 ------- = v outa v outb v outa v refa g a () d a 2 12 ------- = v in+ v outb r 4 v cc- r 3 + r 3 r 4 + ----------------------------------------------- - = v o v in+ 1 r 2 r 1 ----- - + ?? ?? v outa r 2 r 1 ----- - ?? ?? ? = equivalent v 45 v cc+ r 4 v cc- r 5 + r 4 r 5 + ------------------------------------------- - = r 45 r 4 r 5 r 4 r 5 + ------------------ = v in+ v outb r 45 v 45 r 3 + r 3 r 45 + ----------------------------------------------- = v o v in+ 1 r 2 r 1 ----- - + ?? ?? v outa r 2 r 1 ----- - ?? ?? ? = offset adjust gain adjust offset adjust gain adjust v refb
? 2007 microchip technology inc. ds21897b-page 25 mcp4921/4922 6.7 designing a double-precision dac using a dual dac example 6-5 illustrates how to design a single-supply voltage output capable of up to 24-bit resolution from a dual 12-bit dac. this design is simply a voltage divider with a buffered output. as an example, if a similar application to the one devel- oped in section 6.5.1 ?design a bipolar dac using example 6-3? required a resolution of 1 v instead of 1 mv and a range of 0v to 4.1v, then 12-bit resolution would not be adequate. 1. calculate the resolution needed: 4.1v/1uv = 4.1e06. since 2 22 = 4.2e06, 22-bit resolution is desired. since dnl = 0.75 lsb, this design can be attempted with the mcp492x. 2. since dac b ?s v outb has a resolution of 1 mv, its output only needs to be ?pulled? 1/1000 to meet the 1 v target. dividing v outa by 1000 would allow the application to compensate for dac b ?s dnl error. 3. if r 2 is 100 , then r 1 needs to be 100 k . 4. the resulting transfer function is not perfectly linear, as shown in the equation of example 6-5. example 6-5: simple, double-precision dac. v ref mcp492x v dd r 2 v o mcp492x v dd r 1 dac a (fine adjust) dac b (course adjust) spi? 3 r 1 >> r 2 v o v outa r 2 v outb r 1 + r 1 r 2 + ----------------------------------------------------- = g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) 0.1 f v cc + v cc ? v outa v refa g a d a 2 12 ------- = v outb v refb g b d b 2 12 ------- = v outa v outb
mcp4921/4922 ds21897b-page 26 ? 2007 microchip technology inc. 6.8 building a programmable current source example 6-6 illustrates a variation on a voltage follower design where a sense resistor is used to convert the dac?s voltage output into a digitally-selectable current source. adding the resistor network from example 6-2 would be advantageous in this application. the smaller r sense is, the less power dissipated across it. however, this also reduces the resolution that the current can be controlled with. the voltage divider, or ?window?, dac configuration would allow the range to be reduced, thus increasing resolution around the range of interest. when working with very small sensor voltages, plan on eliminating the amplifier's offset error by storing the dac's setting under known sensor conditions. example 6-6: digitally-controlled current source. 6.9 using multiplier mode the mcp492x is ideally suited for use as a multiplier/ divider in a signal chain. common applications include: precision programmable gain/attenuator amplifiers and loop controls (motor feedback). the wide input range (0v ? v dd ) is an unbuffered mode and near r-r range in buffered mode: the > 400 khz bandwidth, selectible 1x/2x gain and its low power consumption give maximum flexibility to meet the application's needs. to configure the mcp492x in multiplier mode, connect the input signal to v ref and serially configure the dac?s input buffer, gain and output value. the dac?s output can utilize any of examples 6-1 to 6-6, depend- ing on the application requirements. example 6-7 is an illustration of how the dac can operate in a motor control feedback loop. if the gain select bit is configured for 1x mode (ga =1), the resulting input signal will be attenuated by d/4096. if the gain select bit is configured for 2x mode (ga =0), codes < 2048 attenuate the signal, while codes > 2048 gain the signal. v out = v in (d/2048). a 12-bit dac provides significantly more gain/attenua- tion resolution when compared to typical programmable gain amplifiers. adding an op amp to buffer the output, as illustrated in examples 6-2 to 6-6, extends the output range and power to meet the precise needs of the application. example 6-7: multiplier mode. v ref mcp492x r sense i b load i l v dd spi? 3 v cc + v cc ? v out g = gain select (1x or 2x) d = digital value of dac (0 ? 4096) i l v out r sense -------------- - 1 + ------------ = v out v ref g d 2 12 ------- = i b i l ---- = v cc + v cc ? v ref mcp492x v rpm + ? v dd spi? 3 v out r sense v rpm_set z fb
? 2007 microchip technology inc. ds21897b-page 27 mcp4921/4922 7.0 development support 7.1 evaluation & demonstration boards the mixed signal pictail tm board supports the mcp492x family of devices. please refer to www.microchip.com for further information on this products capabilities and availability. 7.2 application notes and tech briefs application notes illustrating the performace and imple- mentation of the mcp492x are planned but currently not released. please refer to www.microchip.com for further information.
mcp4921/4922 ds21897b-page 28 ? 2007 microchip technology inc. 8.0 packaging information 8.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it wil l be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn mcp4921 e/p 256 0712 mcp4921 e/sn 0712 256 8-lead msop example: xxxxxx ywwnnn 4921e 712256 3 e 3 e 3 e
? 2007 microchip technology inc. ds21897b-page 29 mcp4921/4922 package marking information (continued) 14-lead pdip (300 mil) example: 14-lead tssop example: 14-lead soic (150 mil) example: xxxxxxxxxxxxxx xxxxxxxxxxxxxx yywwnnn xxxxxxxxxx yywwnnn xxxxxx yyww nnn mcp4922e/p 0712256 4922e/st 0712 256 xxxxxxxxxx mcp4922e/sl 0712256 3 e 3 e 3 e
mcp4921/4922 ds21897b-page 30 ? 2007 microchip technology inc. 8-lead plastic micro small outline package (ms) [msop] n otes: 1 . pin 1 visual index feature may vary, but must be located within the hatched area. 2 . dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15 mm per side. 3 . dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 8 pitch e 0.65 bsc overall height a ? ? 1.10 molded package thickness a2 0.75 0.85 0.95 standoff a1 0.00 ? 0.15 overall width e 4.90 bsc molded package width e1 3.00 bsc overall length d 3.00 bsc foot length l 0.40 0.60 0.80 footprint l1 0.95 ref foot angle 0 ? 8 lead thickness c 0.08 ? 0.23 lead width b 0.22 ? 0.40 d n e e1 note 1 1 2 e b a a1 a2 c l1 l microchip technology drawing c04-111 b
? 2007 microchip technology inc. ds21897b-page 31 mcp4921/4922 8-lead plastic dual in-line (p) ? 300 mil body [pdip] n otes: 1 . pin 1 visual index feature may vary, but must be located with the hatched area. 2 . significant characteristic. 3 . dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010" per side. 4 . dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 8 pitch e .100 bsc top to seating plane a ? ? .210 molded package thickness a2 .115 .130 .195 base to seating plane a1 .015 ? ? shoulder to shoulder width e .290 .310 .325 molded package width e1 .240 .250 .280 overall length d .348 .365 .400 tip to seating plane l .115 .130 .150 lead thickness c .008 .010 .015 upper lead width b1 .040 .060 .070 lower lead width b .014 .018 .022 overall row spacing eb ? ? .430 n e1 note 1 d 12 3 a a1 a2 l b1 b e e e b c microchip technology drawing c04-018 b
mcp4921/4922 ds21897b-page 32 ? 2007 microchip technology inc. 8-lead plastic small outline (sn) ? narrow, 3.90 mm body [soic] n otes: 1 . pin 1 visual index feature may vary, but must be located within the hatched area. 2 . significant characteristic. 3 . dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15 mm per side. 4 . dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millmeters dimension limits min nom max number of pins n 8 pitch e 1.27 bsc overall height a ? ? 1.75 molded package thickness a2 1.25 ? ? standoff a1 0.10 ? 0.25 overall width e 6.00 bsc molded package width e1 3.90 bsc overall length d 4.90 bsc chamfer (optional) h 0.25 ? 0.50 foot length l 0.40 ? 1.27 footprint l1 1.04 ref foot angle 0 ? 8 lead thickness c 0.17 ? 0.25 lead width b 0.31 ? 0.51 mold draft angle top 5 ? 15 mold draft angle bottom 5 ? 15 d n e e e1 note 1 12 3 b a a1 a2 l l1 c h h microchip technology drawing c04-057 b
? 2007 microchip technology inc. ds21897b-page 33 mcp4921/4922 14-lead plastic dual in-line (p) ? 300 mil body [pdip] n otes: 1 . pin 1 visual index feature may vary, but must be located with the hatched area. 2 . significant characteristic. 3 . dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010" per side. 4 . dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units inches dimension limits min nom max number of pins n 14 pitch e .100 bsc top to seating plane a ? ? .210 molded package thickness a2 .115 .130 .195 base to seating plane a1 .015 ? ? shoulder to shoulder width e .290 .310 .325 molded package width e1 .240 .250 .280 overall length d .735 .750 .775 tip to seating plane l .115 .130 .150 lead thickness c .008 .010 .015 upper lead width b1 .045 .060 .070 lower lead width b .014 .018 .022 overall row spacing eb ? ? .430 n e1 d note 1 12 3 e c e b a2 l a a1 b1 b e microchip technology drawing c04-005 b
mcp4921/4922 ds21897b-page 34 ? 2007 microchip technology inc. 14-lead plastic small outline (sl) ? narrow, 3.90 mm body [soic] n otes: 1 . pin 1 visual index feature may vary, but must be located within the hatched area. 2 . significant characteristic. 3 . dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15 mm per side. 4 . dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millmeters dimension limits min nom max number of pins n 14 pitch e 1.27 bsc overall height a ? ? 1.75 molded package thickness a2 1.25 ? ? standoff a1 0.10 ? 0.25 overall width e 6.00 bsc molded package width e1 3.90 bsc overall length d 8.65 bsc chamfer (optional) h 0.25 ? 0.50 foot length l 0.40 ? 1.27 footprint l1 1.04 ref foot angle 0 ? 8 lead thickness c 0.17 ? 0.25 lead width b 0.31 ? 0.51 mold draft angle top 5 ? 15 mold draft angle bottom 5 ? 15 note 1 n d e e1 1 2 3 b e a a1 a2 l l1 c h h microchip technology drawing c04-065 b
? 2007 microchip technology inc. ds21897b-page 35 mcp4921/4922 14-lead plastic thin shrink small outline (st) ? 4.4 mm body [tssop] notes: 1. pin 1 visual index feature may vary, but must be located within the hatched area. 2. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.15 mm per side. 3. dimensioning and tolerancing per asme y14.5m. bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging units millimeters dimension limits min nom max number of pins n 14 pitch e 0.65 bsc overall height a ? ? 1.20 molded package thickness a2 0.80 1.00 1.05 standoff a1 0.05 ? 0.15 overall width e 6.40 bsc molded package width e1 4.30 4.40 4.50 molded package length d 4.90 5.00 5.10 foot length l 0.45 0.60 0.75 footprint l1 1.00 ref foot angle 0 ? 8 lead thickness c 0.09 ? 0.20 lead width b 0.19 ? 0.30 note 1 d n e e1 1 2 e b c a a1 a2 l1 l microchip technology drawing c04-087 b
mcp4921/4922 ds21897b-page 36 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds21897b-page 37 mcp4921/4922 appendix a: revision history revision b (february 2007) this revision includes updates to the packaging diagrams.
mcp4921/4922 ds21897b-page 38 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds21897b-page 39 mcp4921/4922 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx package temperature range device device: mcp4921: 12-bit dac with spi interface mcp4921t: 12-bit dac with spi interface (tape and reel) (soic, msop) mcp4922: 12-bit dac with spi interface mcp4922t: 12-bit dac with spi interface (tape and reel) (soic, msop) temperature range: e = -40c to +125c package: ms = plastic msop, 8-lead p = plastic dip (300 mil body), 8-lead, 14-lead sn = plastic soic, (150 mil body), 8-lead sl = plastic soic (150 mil body), 14-lead st = plastic tssop (4.4mm body), 14-lead examples: a) mcp4921t-e/sn: tape and reel extended temperature, 8ld soic package. b) mcp4921t-e/ms: tape and reel extended temperature, 8ld msop package. c) mcp4921-e/sn: extended temperature, 8ld soic package. d) mcp4921-e/ms: extended temperature, 8ld msop package. e) mcp4921-e/p: extended temperature, 8ld pdip package. a) mcp4922t-e/sl: tape and reel extended temperature, 14ld soic package. b) mcp4922t-e/st: tape and reel extended temperature, 14ld tssop package. c) mcp4922-e/p: extended temperature, 14ld pdip package. d) mcp4922-e/sl: extended temperature, 14ld soic package. e) mcp4922-e/st: extended temperature, 14ld tssop package.
mcp4921/4922 ds21897b-page 40 ? 2007 microchip technology inc. notes:
? 2007 microchip technology inc. ds21897b-page 41 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , micro id , mplab, pic, picmicro, picstart, pro mate, powersmart, rfpic, and smartshunt are registered trademarks of micr ochip technology incorporated in the u.s.a. and other countries. amplab, filterlab, migratable memory, mxdev, mxlab, seeval, smartsensor and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, appl ication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, linear active thermistor, mindi, miwi, mpasm, mplib, mplink, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powe rtool, real ice, rflab, rfpicdem, select mode, smart serial, smarttel, total endurance, uni/o, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2007, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona, gresham, oregon and mountain view, california. the company?s quality system processes and procedures are for its pic ? mcus and dspic dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
ds21897b-page 42 ? 2007 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway habour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - fuzhou tel: 86-591-8750-3506 fax: 86-591-8750-3521 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - shunde tel: 86-757-2839-5507 fax: 86-757-2839-5571 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7250 fax: 86-29-8833-7256 asia/pacific india - bangalore tel: 91-80-4182-8400 fax: 91-80-4182-8422 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - gumi tel: 82-54-473-4301 fax: 82-54-473-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - penang tel: 60-4-646-8870 fax: 60-4-646-5086 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-572-9526 fax: 886-3-572-6459 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 12/08/06

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